Higher-level hardware synthesis of the kasumi algorithm kasum算法的更高水平的硬件綜合實(shí)現(xiàn)方法
At the same time, research effort is going into higher-level hardware synthesis methodologies for reconfigurable computing that can exploit pld technology 與此同時(shí),研究人員則努力研究使用fpgas技術(shù)的可重新配置計(jì)算的硬件合成方法論。
Then, a new design automation methodology is put forward which uses uml for specification, systmec for simulation and synopsys tools ( cocentric systemc compiler ) for hardware synthesis . the main feature of this methodology is its high possibility of implementation 提出了一個(gè)基于uml系統(tǒng)描述的,systemc模擬驗(yàn)證的,利用cocentricsystemccomplier進(jìn)行硬件綜合的自動(dòng)化設(shè)計(jì)方案,這個(gè)方案最大特點(diǎn)是可實(shí)現(xiàn)性強(qiáng)。